             ;******* Assert valid trap addressing mode 
             oldIR4:  .EQUATE 13         ;oldIR + 4 with two return addresses 
FCCA  C00001 assertAd:LDA     1,i        ;A := 1 
FCCD  DB000D          LDBYTEX oldIR4,s   ;X := OldIR 
FCD0  980007          ANDX    0x0007,i   ;Keep only the addressing mode bits 
FCD3  0AFCDD          BREQ    testAd     ;000 = immediate addressing 
FCD6  1C     loop:    ASLA               ;Shift the 1 bit left 
FCD7  880001          SUBX    1,i        ;Subtract from addressing mode count 
FCDA  0CFCD6          BRNE    loop       ;Try next addressing mode 
FCDD  91FC53 testAd:  ANDA    addrMask,d ;AND the 1 bit with legal modes 
FCE0  0AFCE4          BREQ    addrErr    
FCE3  58              RET0               ;Legal addressing mode, return 
FCE4  50000A addrErr: CHARO   '\n',i     
FCE7  C0FCF4          LDA     trapMsg,i  ;Push address of error message 
FCEA  E3FFFE          STA     -2,s       
FCED  680002          SUBSP   2,i        ;Call print subroutine 
FCF0  16FFE2          CALL    prntMsg    
FCF3  00              STOP               ;Halt: Fatal runtime error 
FCF4  455252 trapMsg: .ASCII  "ERROR: Invalid trap addressing mode.\x00"
      ...
